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Editorial

Peggy Aycinena
EDA Weekly
The Best of Times, The Worst of Time: Part 2 Since Part 1 of this article was published on October 13th, events have begun to overwhelm. The dramatic speed with which the …

Mark Gilbert
Careers Corner
Remember that kids' nursery rhyme LAYOFFS, FREEZES, GENERAL DOWNTURN… O MY?

Dr. Russ Henke & Dr. Jack Horgan
EDA & IP Commentary
Commentary: Electronics IP Industry - A November 2008 Update

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Jobs

Systems Cache Design Lead for Sun Microsystems at Santa Clara, CA

Senior Corporate Applications Engineer for Springsoft, Inc at San Jose, CA

Senior Design Automation Engineer / Project Lead for Sun Microsystems at Santa Clara, CA

Verification Engineer - Microprocessors for Sun Microsystems at Santa Clara, CA

Sr. Software Engineer - Place & Route (Routing, Timing & Optimization) for Mentor Graphics Corporation at San Jose, CA

SOC Northbridge Architect for Sun Microsystems at Santa Clara, CA

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Books For Sale

Digital Control System Analysis and Design (3rd Edition), by Charles L. Phillips, H. Troy Nagle.

Probabilistic Methods of Signal and System Analysis (Oxford Series in Electrical and Computer Engineering), by George R. Cooper, the late Clare D. McGillem.

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Upcoming Events

DASIP 2008 at Université Libre de Bruxelles Belgium - Nov 24 - 26, 2008

SPS/IPC/DRIVES 2008 at Karl-Schönleben-Strasse Nuremberg Germany - Nov 25 - 27, 2008

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Tutorials

Identify® RTL Debugger

ADC Architectures III: Sigma-Delta ADC Basics

The Role of B2 Spice A/D v4

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